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PS810
Li Ion Single Cell Fuel Gauge
Hardware Features
* Highly accurate fuel gauge for single cell Li Ion applications * Algorithms are implemented using an embedded PIC18 low-power microcontroller with 16-bit instruction set * Reports current, voltage and temperature utilizing a programmable 8 to15-bit + sign, sigma-delta ADC * Host communication accomplished through an industry standard SMBus interface or an alternative single pin serial interface * I/O pins are available to provide functions such as digital GPIO, coin cell voltage measurement and thermistor input * Integrated temperature sensor and regulator minimize external components * Embedded fuel gauge algorithms and application specific parameters are stored in a 4K x 16 Flash memory * 512 bytes of RAM are available for temporary storage of battery parameters
Pin Description
16-pin QFN (4 mm x 4 mm)
SDA/SPS IO6 SCL/IO0
16 15 14 13 NTC/IO2 VCOIN/IO3 VFILTER MCLR 1 2 3 4 56 VC1 N/C 78 N/C ROSC 12 IO5 IO4 GND SR 11 10 9
14-pin TSSOP
SCL/IO0 IO1 NTC/IO2 VCOIN/IO3 VFILTER MCLR VC1 1 2 14 13 SDA/SPS IO6 IO5 IO4 GND SR ROSC
PS810
3 4 5 6 7
IO1
PS810
12 11 10 9 8
Software Features
* Provides battery status, such as average time to empty, relative State-Of-Charge and battery State-Of-Health * In-system offset calibration compensates for offset error in current measurement
Package Features
* 16-pin QFN package or 14-pin TSSOP package * -20C to +85C operating temperature range
1.0
PRODUCT OVERVIEW
To provide precise measurements of current, voltage and temperature, the PS810 integrates a highly accurate 15-bit + sign, sigma-delta A/D converter. Based upon operating conditions, this programmable converter can be configured to measure specific battery parameters with a resolution of 8 to 15 bits + sign. Precision measurements combined with advanced algorithms provide accurate indications of capacity, run time, State-Of-Health and safety and charge/discharge conditions. The ability to operate directly from a single Li Ion or Li Polymer cell minimizes the need for external components, such as a voltage regulator and voltage divider. To further limit external circuitry and enhance accuracy, the PS810 provides an integrated temperature sensor and oscillator.
The PS810 is a fuel gauge for one-cell Li Ion or Li Polymer applications. The device provides the host and the system user with critical battery information, such as voltage, current, temperature, run time, State-Of-Charge and State-Of-Health. This information is available through an industry standard SMBus or an alternative Single Pin Serial interface. Advanced fuel gauge algorithms are stored in on-board Flash memory and executed by the industry recognized PIC18 microcontroller. These algorithms include compensation factors which optimize the performance of the battery for a specific application and operating environment. Compensation is included for the effects of temperature, discharge rate, charge rate and battery aging.
(c) 2006 Microchip Technology Inc.
DS21904C-page 1
PS810
TABLE 1-1:
Pin# Pin Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NTC/IO2 VCOIN/IO3 VFILTER MCLR VC1 N/C N/C ROSC SR GND IO4 IO5 IO6 SDA/SPS SCL/IO0 IO1
PS810 QFN PIN SUMMARY
Description External NTC input or GPIO Coin cell monitor input or GPIO Power supply filter cap Master Clear Cell voltage input No connect No connect Oscillator bias resistor Sense resistor input Power supply ground General purpose IO General purpose IO General purpose IO SMBus data/one-wire serial line SMBus clock or GPIO0 General purpose IO
TABLE 1-2:
Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name SCL/IO0 IO1 NTC/IO2 VCOIN/IO3 VFILTER MCLR VC1 ROSC SR GND IO4 IO5 IO6 SDA/SPS
PS810 TSSOP PIN SUMMARY
Description SMBus clock or GPIO General purpose IO External NTC input or GPIO Coin cell monitor input or GPIO Power supply filter cap Master Clear Cell voltage input Oscillator bias resistor Sense resistor input Power supply ground General purpose IO General purpose IO General purpose IO SMBus data/one-wire serial line
FIGURE 1-1:
PS810 INTERNAL BLOCK DIAGRAM
Digital Section
Analog Section
VFILTER Voltage Voltage Reference and Reference and Temp Sensor Temp Sensor Voltage Voltage Regulator Regulator
4K xx16 Flash 4K 16 Flash
512-byte RAM/ 512-byte RAM/ Registers Registers
VC1 SDA/SPS PIC18F PIC18F Microcontroller Microcontroller Comm Comm Interface Interface Control and Status Control and Status Run Run Oscillator Oscillator IO0 IO1 IO2 Input/Output Input/Output Sleep Sleep Oscillator Oscillator 15-bit ++sign 15-bit sign Sigma-Delta Sigma-Delta Integrating Integrating A/D Converter A/D Converter Analog Analog Input Mux Input Mux SR NTC VCOIN
SCL
ROSC IO3 IO4 IO5 IO6 MCLR
GND
DS21904C-page 2
(c) 2006 Microchip Technology Inc.
1.1 Schematic
FIGURE 1-2:
DO
CELL CONNECTIONS 6 NC NC PS810Q U1 QFN PACKAGE R9 GROUND PLANE CONNECTION 0.020 7
V1 232K C10 1.0 nF C5 100 nF
VC1
ROSC
VSS
4
5
4
5
VR
CO
8 1
(c) 2006 Microchip Technology Inc.
15 SCL/IO0 SDA/SPS IO1 NTC/IO2 VCOIN/IO3 VFILTER MCLR 8 R8 3 SR 9 100 nF GND 10 C32 IO4 11 VM 470 SAFETY IC 1 IO5 12 2 VDD R32 U2 S8241A IO6 13 3 2 16 1 240 3 4 5 R2 2 14 20 20 D1 R15 R14 240 240 1 CMSZDA5V6 R21 R20 B+ C D BPACK CONNECTION 20 R5 R4 C2 100 nF C3 100 nF 20K Q1 6 7 2 3 R31 1.0K
EXT. THERMISTOR INPUT
COIN CELL INPUT
NTC * NVR VCOIN *
* GROUND IF NOT USED
PS810 APPLICATION SCHEMATIC - PS810-BASED BATTERY PACK
TPCS8209
DS21904C-page 3
PS810
PS810
1.2 Bill of Materials
PS810 BILL OF MATERIALS
Symbol Description Raw PCB, PS8110 C10 Capacitor, Ceramic, 1.0 nF, 25V, +/-10%, X7R dielectric, 0402 Capacitor, Ceramic, 100 nF, 16V, +/-10%, X7R dielectric, 0603 Dual Zener Diode, 5.6V, +/-10%, 200 mW, common anode, SOT-323 MOSFET, dual N-channel Enhancement mode, 20V, 5A, TSSOP-8/4.4 mm body width package Mftr. Microchip Panasonic Mftr. PN 04-826197 Rev. 1.1 ECJ-0EB1E102K Supplier Microchip Digikey Supplier PN 04-826197 Rev. 1.1 PCC102BQCT-ND Qty 1 1
TABLE 1-3:
ID 1 04-826197 Rev. 1.1
Part Number
2 CC-0402-10X7R25-1.0NF-01
3 CC-0603-10X7R16-100NF-01
C2, C3, C5, C32
Panasonic
ECJ-1VB1C104K
Digikey
PCC1762CT-ND
4
4 DZ-SOT323-10D-CMSZDA5V6-01 D1
Central Semi. CMSZDA5V6 Diodes Inc. AZ23C5V6W-7 Toshiba TPCS8209(TE12L)
Central Semi. CMSZDA5V6 Diodes Inc. AZ23C5V6W-7 Digikey TPCS8209CT-ND
1
5 QM-TSSOP844-DN-TPCS8209-01 Q1
1
6 RF-0402-5-20-01 (Note 1) 7 RF-0402-5-20K-01 (Note 1) 8 RF-0603-ITC25-221K-01 (Note 1) 9 RF-0603-5-1.0K-01 (Note 1) 10 RF-0603-5-470-01 (Note 1) 11 RF-0805-5-20-01 (Note 1) 12 RF-0805-5-240-01 (Note 1) 13 RF-1206-1-0.029-01 (Note 1) 14 UM-SOT235-4085S8241ABPMCGBPT2-01 15 UM-QFN164X4-2085-PS810-01
R14, R15 Resistor, film, 0402, 5%, 20 ohms R4 R8 R31 R32 R5 R2, R20, R21 R9 U2 Resistor, film, 0402, 5%, 20 kOhms Resistor, film, 0603, 1%, 232 kOhms, 25 ppm TC Resistor, film, 0603, 5%, 1.0 kOhms Resistor, film, 0603, 5%, 470 ohms Resistor, film, 0805, 5%, 20 ohms Resistor, film, 0805, 5%, 240 ohms Resistor, metal strip, 1206, 1%, 0.020 ohms
Panasonic Panasonic Susumu Co. Ltd. Panasonic Panasonic Panasonic Panasonic Vishay
ERJ-2GEJ200X ERJ-2GEJ203X RR0816P-2213-D-34D ERJ-3GEYJ102V ERJ-3GEYJ471V ERJ-6GEYJ200V ERJ-6GEYJ241V
Digikey Digikey Digikey Digikey Digikey Digikey Digikey
P20JCT-ND P20KJCT-ND RR08P221KDCT-ND P1.0KGCT-ND P470GCT-ND P20ACT-ND P240ACT-ND WSL1206-0.020-1%-R86 S-8241ABPMC-GBP-T2 (Note 2) PS810
2 1 1 1 1 1 3 1 1
WSL1206-0.020-1%-R86 Vishay S-8241ABPMC-GBP-T2 (Note 2) PS810 Seiko Instruments Microchip
IC, Battery Protection Circuit, Seiko Li Ion, 1-cell, -40C to +85C, Instruments SOT23-5 package IC, Low-Voltage Fuel Gauge, Microchip -20C to +85C, QFN-16/ 4.0x4.0 mm package
U1
1
Note
1: 2:
Resistor sizes shown are minimum recommended sizes for the application. Other variants of the S-8241A series, with different trip points, are also available. Consult the S-8241A series data sheet.
DS21904C-page 4
(c) 2006 Microchip Technology Inc.
PS810
2.0 ARCHITECTURAL OVERVIEW
2.5 RAM Memory
The PS810 contains a complete analog "front-end" for battery monitoring as well as an embedded microcontroller, with supporting memory, for control, measurement accumulation, calculation and communications. Major functions within the PS810 include: * * * * * * * Voltage Regulator Precision Time Base Temperature Sensor 4K x 16 Flash Memory 512-byte RAM Memory 15-bit plus sign Analog-to-Digital (A/D) Converter SMBus/I2CTM or Single Pin Serial Communications Interface * PIC18 Microcontroller Figure 1-1 is a block diagram of the internal circuitry of the PS810. Figure 1-2 is a schematic diagram that depicts the PS810 in a typical single cell lithium ion application. The function of each of the blocks listed above is summarized in the following sections. 512 bytes of general purpose RAM memory is provided for storage of temporary parameters.
2.6
A/D Converter
The PS810 incorporates an integrating sigma-delta A/D converter together with an analog that has inputs for charge and discharge current, cell voltage, coin cell voltage, the on-chip temperature sensor and an off-chip thermistor. The converter can be programmed to perform a conversion with resolutions of 8 to 15 bits + sign, while utilizing either a single-ended +300 mV or a differential 150 mV reference.
2.7
SMBus/I2CTM or Single Pin Serial Communications Interface
This communications port for the PS810 is selectable as a 2-pin industry standard SMBus/I2C or a single pin interface. All commands, status and data are read or written from the host system via this interface.
2.7.1
SMBus/I2C
2.1
Internal Voltage Regulator
The PS810 incorporates an internal voltage regulator that supports 1-cell lithium pack configurations. The internal regulator draws power directly from the VC1 input. No other external components are required to regulate circuit voltage.
The two pin communication interface uses one clock pin and one data pin and is compatible with the industry standard System Management Bus (SMBus) and the Inter IC Communication Bus (I2C).
2.7.2
SINGLE PIN SERIAL INTERFACE
2.2
Precision Time Base
The integrated precision time base is a highly accurate RC oscillator that provides precise timing for the sigmadelta A/D and for the on-chip elapsed time counters without the need for an external crystal. This time base is trimmed during manufacturing to a nominal frequency of 512 kHz.
The Single Pin Serial (SPS) interface consists of one pin only: the SDA/SPS pin (pin 14). This communication is an asynchronous return-to-one protocol. The timing of the driven low pulses defines the communication.
2.8
PIC18 Microcontroller
2.3
Temperature Sensor
An integrated temperature sensor is provided that can eliminate the need for an external thermistor. As an option, a connection is provided for an external thermistor for applications where the battery cell is physically separated from the PS810.
The PIC18 is a high-performance, CMOS, fully static 8-bit microcontroller. The PIC18 employs an advanced RISC architecture. This device has enhanced core features, such as 31 level deep stack and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 16-bit wide instruction word with a separate 8-bit wide data bus. The two-stage instruction pipeline allows all instructions to execute in a single cycle, except for program branches, which require two cycles. A total of 75 instructions are available.
2.4
Flash Memory
4K x 16 of Flash memory is incorporated for storage of nonvolatile parameters, such as PowerSmart(R) 3D cell models, fuel gauge algorithms and application specific data.
(c) 2006 Microchip Technology Inc.
DS21904C-page 5
PS810
NOTES:
DS21904C-page 6
(c) 2006 Microchip Technology Inc.
PS810
3.0
3.1
OPERATIONAL DESCRIPTION
A/D Operation
3.1.1.1
Sense Resistor Selection and Current Measurement Range
The PS810 A/D converter measures current, voltage and temperature and integrates the current over time to calculate State-Of-Charge. Cell voltage is measured with a direct connection to the battery cell without requiring an external voltage divider. Using an external sense resistor, current is monitored during both charge and discharge and is integrated over time using the onchip oscillator as the time base. Temperature is measured from the on-chip temperature sensor or an optional external thermistor. Voltage, current and temperature can be calibrated for accuracy over the operational range. The A/D converter performs sampling using a 32 kHz clock.
The current resolution is based on the smallest amount of voltage the A/D converter can measure across the sense resistor. Since this measurement uses 13 bits (plus sign) and the reference used is the internal 150 mV reference, the smallest voltage across the sense resistor that can be measured is:
EQUATION 3-1:
150 mV/(2 ^ 13 - 1) = 150 mV/32767 = 18.3 V Thus, the smallest current that can be measured is: 18.3 V/RSENSE (m) The largest current that can be measured is: 150 mV/RSENSE (m) Example: a 20 milliohm sense resistor will measure from: 18.3 V/20 m = 0.915 mA (though will be recorded as zero if < NullCurr) up to: 150 mV/20 m = 7.5 Amps
3.1.1
CURRENT MEASUREMENT
The A/D input channels for current measurement are the SR and GND pins. The voltage drop across the sense resistor is measured and converted mathematically into a current measurement. The current is also integrated over time to get the amount of charge entering or leaving the battery. A sense resistor is connected to SR and GND. The maximum input voltage that can be measured at SR is +/-150 mV. The sense resistor should be properly sized to accommodate the lowest and highest expected charge and discharge currents, including suspend and/ or standby currents. The parameter NullCurr represents the zero-zone current of the battery. This is provided as a calibration guardband for reading zero current. Currents below +/- NullCurr (in mA) limit are read as zero and not included in the capacity algorithm calculations. A typical value for NullCurr is 3 mA, therefore, currents between -3 mA and +3 mA will be reported as zero and not included in the capacity calculations. This feature is provided so that electrical noise on the battery module current path is not interpreted as actual charge entering or leaving the battery.
3.1.1.2
Current Calibration
In-circuit calibration of the current is done using the communication interface (SMBus/I2C or SPS) at time of manufacture to obtain optimal accuracy. A correction is calculated and stored for both offset and slope. COD is a constant that is measured at calibration time and contains the offset due to external PCB components. CFCurr is the "Correction Factor for Current" which compensates the A/D gain and any variances in the actual sense resistance over varying currents. It is multiplied against the raw A/D measurement. COCurr is the "Correction Offset for Current" which is updated in real time by the A/D shorting the inputs and comparing any result to zero. This is added to COD and compensates for any offset that varies over time, such as temperature dependent offsets. Figure 3-1 shows the relationship of the COCurr and CFCurr values.
(c) 2006 Microchip Technology Inc.
DS21904C-page 7
PS810
FIGURE 3-1: COCurr AND CFCurr VALUE RELATIONSHIP
Ideal A/D Response The VC1 input circuit contains an internal resistive divider to reduce the external voltage input to a range that the internal A/D circuit can accommodate (300 mV maximum). The divider is 15 to 1 based on a maximum cell voltage of 4.5 volts. The voltage divider is only connected to ground when the actual voltage measurement is occurring. CFVoltage is the "Correction Factor for Pack Voltage" which compensates for any variance in the actual A/D response versus an ideal A/D response over varying voltage inputs. In-circuit calibration of the voltage is done at the time of manufacture to obtain accuracy in addition to high resolution. Cell voltage measurements can be accurate to within 20 mV.
Raw Measurement
CFCurr COCurr
Actual A/D Response
Actual Current
3.1.4
TEMPERATURE MEASUREMENTS
3.1.2
AUTO-OFFSET COMPENSATION
The A/D can measure temperature from the internal temperature sensor or an external thermistor connected to the NTC pin. The A/D uses a default of 11-bit plus sign resolution for the temperature measurements. A standard 10 kOhms at 25C Negative-TemperatureCoefficient (NTC) device of the 103ETB type is suggested for the optional external thermistor. One leg of the NTC should be connected to the NTC pin and the other to ground. A linearization algorithm is used to convert the voltage measurement seen at the NTC pin to a temperature value. The external thermistor should be placed as close as possible to the battery cells and should be isolated from any other sources of heat that may affect its operation. Calibration of the temperature measurements involves a correction factor and an offset exactly like the current measurement. The internal temperature measurement makes use of correction factor, CFTempI and offset, COTempI, while the NTC pin for the optional external thermistor makes use of correction factor, CFTempE.
Accuracy drift is prevented using an automatic autozero self-calibration method which zeros the current measurement circuit periodically at a programmable rate. This feature can correct for drift in temperature during operation. The Auto-Offset Compensation circuit works internally by disconnecting the RS input and internally shorting it to GND to measure the zero input offset. Furthermore, the calibration factor, COD, contains the offset factor external to the IC, offset due to the circuit board, system, etc. COD is added to the internal offset calculated by the auto-offset cycle to determine the full offset, COCurr.
3.1.3
VOLTAGE MEASUREMENTS
The A/D input channel for cell voltage measurement is the VC1 pin. Measurements are taken each measurement period when the A/D is active. The maximum voltage at the VC1 pin is 5.5V, but voltages above 4.5V are not suggested since this will saturate the A/D. The cell voltage is measured with an integration method to reduce any sudden spikes or fluctuations. The A/D uses a default of 11-bit plus sign resolution for these measurements.
DS21904C-page 8
(c) 2006 Microchip Technology Inc.
PS810
TABLE 3-1:
Parameter Name NullCurr
A/D OPERATION PARAMETERS
# of Bytes 1 Units mA Typical Value 3 Operational Description Zero zone control is built into the PS810 so that electrical noise doesn't actually drain the gas gauge, when in fact the current is zero. For this reason, current less than NullCurr mA in either direction will be measured as zero. Correction Factor for Current. Adjusts the scaling of the sense resistor current measurements. Correction Offset for Current. This is the value the A/D reads when zero current is flowing through the sense resistor. Correction Offset Deviation. Offset value for the auto-zero calibration of the current readings. Interval of time between auto-offset calibrations.
CFCurr COCurr COD AOMInterval AVGIScale
2 1 1 1 1
unsigned word signed byte signed byte op cycles coded
4200 0 0 60
b00100000 Time period over which current is averaged to calculate average current: IAVG = IAVG + (I - IAVG)/(AVGIScale * 2). Note: Only Most Significant set bit is used, others are ignored. 2250 2250 326 Correction Factor for Pack Voltage. Adjusts the scaling of the VC1 pin measurement. Correction Factor for Coin Cell Measurement. Adjusts the scaling of the VCOIN pin measurement. Correction Factor for Temperature. Adjusts the scaling of temperature measured across an external thermistor at the NTC input pin. Correction Factor for Temperature. Adjusts the scaling of temperature measured from the internal temperature sensor. Correction Offset for Temperature. Used for temperature measurement using internal temperature sensor.
CFVoltage CFCoin CFTempE
2 2 2
integer integer integer
CFTempI COTempI
2 2
integer signed word
2038 21298
(c) 2006 Microchip Technology Inc.
DS21904C-page 9
PS810
3.2 Operational Modes
3.2.3 LOW-VOLTAGE SLEEP MODE
The PS810 operates on a continuous cycle, measuring current, voltage and temperature, then performing fuel gauge calculations. There are four power modes: Run mode, in which the measuring and calculating loop constantly repeats; Bus Inactive Low-Power mode, in which only self-discharge is calculated; Low-Voltage Sleep mode, in which there are no measurements and only wake-up circuitry is powered; and Shelf-Sleep mode, in which only communication line sensors are powered. Entry to Low-Voltage Sleep mode can only occur when the measured pack voltage at VC1 input is below a preset limit set by the parameter SleepVoltage (in mV) and the current is zero (less than NullCurr). Sleep mode may be exited to Run mode when the voltage at VC1 is greater than the wake-up voltage, which is 3.2 volts, 10%. While in 10% Sleep mode, no measurements occur and no calculations are made. The fuel gauge display is not operational, no communications are recognized and only a wake-up condition will permit an exit from Sleep mode. Sleep mode is one of the lowest power consuming modes and is used to conserve battery energy following a complete discharge. There are two power levels that can be chosen for LowVoltage Sleep mode. Low-Power mode draws approximately 20 A and will wake-up automatically when the voltage rises above the wake-up voltage, which is a constant 3.2 volts above the wake-up volts, +/-5%. Ultra Low-Power mode draws less than 1 A and requires an external source to drive the communication line high to wake-up, since the voltage wake-up comparator is powered down.
3.2.1
RUN MODE
Run mode is the highest power consuming mode. During Run mode, all measurements and calculations occur. Current, voltage and temperature measurements are each made sequentially. Run mode is active until voltage drops below the Sleep voltage, the bus goes inactive or the Shelf-Sleep command is executed.
3.2.2
BUS INACTIVE LOW-POWER MODE
The PS810 enters Low-Power mode when all of the following conditions are true: * Current is zero (optional) * The communication pins are low for at least 8 periods of 512 ms each * There is no communication attempt for at least 8 periods of 512 ms each To enter this mode, typically, there must be no load or charger present and no communication host. The pack is out of the system. In this mode, the PS810 will draw less current from the battery, approximately 25 A and will only track self-discharge. Alternatively, if selfdischarge tracking is not required, Ultra Low-Power mode can be used and the PS810 will draw less than 1 microamp.
3.2.4
SHELF-SLEEP MODE
Shelf-Sleep mode can be entered by a battery data command on the communication bus for conserving energy while shipping battery packs. It can be exited only by an external source driving the communication data line high. This mode uses the Ultra Low-Power Sleep mode, resulting in current draw less than 1 microamp. This mode is entered by writing a password to SMBus command code, 0x43. A word write protocol is used to write the password, 0x5A7A.
TABLE 3-2:
Mode Run
OPERATIONAL MODES
Entry Voltage > Wake-up voltage or data line driven high Current < NullCurr, communication lines low and no communication attempts VC(1) < SleepVoltage, Current is not zero Can be entered by SMBus command Exit Voltage less than SleepVoltage, bus Idle or Shelf-Sleep command issued Activity on communication lines Notes Highest power consumption and accuracy. Only self-discharge calculated.
Bus Inactive Low-Power
Low-Voltage Sleep Shelf-Sleep
Voltage > Wake-up voltage (Low-Power mode), Data line driven high (Ultra Low-Power mode) Data line driven high
No measurements made. No measurements made.
DS21904C-page 10
(c) 2006 Microchip Technology Inc.
PS810
TABLE 3-3:
Parameter Name SleepVoltage PwrConsumSleep PowerModes
OPERATIONAL MODE PARAMETERS
# Bytes 2 1 1 Units mV 1/256 mA bitmap Typical Value 2700 7 Operational Description The pack voltage at which the PS810 will enter Low-Voltage Sleep mode. The average current that the battery module typically draws from the battery while in Low-Power mode.
b00000101 bit 5: 1 = Bus Inactive mode, always uses Ultra Low-Power mode until first bus communication after POR 0 = Disable Bus Inactive Low-Power mode bit 4: 1 = Enable Bus Inactive Low-Power mode 0 = Disable Bus Inactive Low-Power mode bit 3: 1 = Use Ultra Low-Power mode as Bus Inactive Low-Power mode (no self-discharge calculations) 0 = Use Low-Power mode with self-discharge calculations as Bus Inactive Low-Power mode bit 2: 1 = Require NullCurr for Bus Inactive Low-Power mode and Low-Voltage Sleep mode 0 = No NullCurr requirement for Sleep modes bit 1: 1 = Use Ultra Low-Power mode as Low-Voltage Sleep mode 0 = Use Low-Power mode as Low-Voltage Sleep mode bit 0: 1 = Set remcap to zero when entering Low-Voltage Sleep mode 0 = Do not change remcap when entering Low-Voltage Sleep mode
(c) 2006 Microchip Technology Inc.
DS21904C-page 11
PS810
NOTES:
DS21904C-page 12
(c) 2006 Microchip Technology Inc.
PS810
4.0 CAPACITY MONITORING
The PS810 uses the voltage, current and temperature data from the A/D converter, along with battery algorithms and cell models, to determine the state of the battery and to process the battery data instruction set. By integrating measured current, monitoring voltages and temperature, adjusting for self-discharge and checking for End-Of-Charge and End-Of-Discharge conditions, the PS810 creates an accurate fuel gauge under all battery conditions. The total capacity added or subtracted from the battery (change in charge) per measurement period is expressed by the following formula:
EQUATION 4-1:
Charge = it (the current integrated over time) - PwrConsumption * t - Self-discharge percentage * FCC The battery current will be precisely measured and integrated in order to calculate total charge removed from or added to the battery. Based on look-up table values, the capacity is adjusted relative to discharge rate and temperature.
4.1
Capacity Calculations
The PS810 calculates State-Of-Charge and fuel gauging functions using a `coulomb counting' method, with additional inputs from battery voltage and temperature measurements. By continuously and accurately measuring the current into and out of the battery cells, along with accurate three-dimensional cell models, the PS810 is able to provide accurate predictions of SOC and run time. The capacity calculations consider two separate states: charge or Capacity Increasing (CI) and discharge or Capacity Decreasing (CD). The CI state only occurs when a charge current larger than the parameter NullCurr value is measured. Otherwise, while at rest and/or while being discharged, the state is CD. Conditions must persist for at least NChangeState measurement periods for a valid state change between CD and CI. A minimum value of 2 is suggested for NChangeState. Regardless of the CI or CD state, self-discharge is also calculated and subtracted from the integrated capacity values. Even when charging, there is still a selfdischarge occurring in the battery. Self-discharge is modelled internally in the PS810 and is a factor of temperature and State-Of-Charge. Since the PS810 electronics also drain current from the battery system, another parameter value allows even this minor drain to be included in the capacity calculations. The PwrConsumption value represents the drain of the IC and associated circuitry, including additional safety monitoring electronics, if present. A typical value of 31 represents the modules nominal power consumption, including PS810 typical consumption of 85 A.
4.2
Discharge Termination
Remaining capacity is determined based on the EndOf-Discharge (EOD) voltage point. The voltage level at which this point occurs will change depending on the temperature and discharge rate, since these factors affect the voltage curve and total capacity of the battery. The EOD voltage look-up table predicts the voltage point at which this EOD will be reached based on discharge rate and temperature. The PS810 will monitor temperature and discharge rate continuously and update the EOD voltage from the look-up table in real time. When the voltage measured on the cell is below the EOD voltage for the duration of EODRecheck x periods (500 ms), a valid EOD has occurred. When a valid EOD has been reached, the FULLY_DISCHARGED bit in BatteryStatus will be set.
4.3
Capacity Relearn
To maintain accurate capacity prediction ability, the FullCapacity value is relearned on each discharge, which has reached a valid EOD after a previous valid fully charged EOC. If a partial charge occurs before reaching a valid EOD, then no relearn will occur. The difference between the old FCC and the new learned FCC will be limited to 256 mAh, except when cycles are less than RLCycles.
(c) 2006 Microchip Technology Inc.
DS21904C-page 13
PS810
4.4
4.4.1
EOD Voltage Look-up Table
NEAR EMPTY RESERVE CAPACITY POINT
3.
Constant Reserve Energy for System Shutdown If the system needs a certain amount of energy for a system shutdown procedure that will require a certain discharge rate and a certain amount of time, then the discharge rate could change suddenly as soon as the End-OfDischarge voltage point is hit. The voltage entries should then represent a remaining capacity that exists at the future discharge rate of the shutdown procedure.
Available capacity in the battery varies with temperature and discharge rate. Since the remaining capacity will vary with temperature and discharge rate, a shutdown point, or End-Of-Discharge voltage, will also vary with temperature and discharge rate in order to leave enough reserve energy in the battery to allow a system to perform a shutdown procedure under all conditions. The End-Of-Discharge voltage look-up table allows for entry of 64 different voltages as a function of 8 different temperature regions and 8 different discharge rate regions. Linear interpolation is used to determine the End-Of-Discharge voltage within the regions. It is recommended to use the table in one of three ways: 1. Constant Shutdown Voltage If the system does not require any reserve energy, then the same voltage can be used in all table entries. This should be the lowest voltage the battery can safely discharge to, or the lowest voltage that will support system operation, whichever is higher. 2. Constant Remaining Capacity To give a warning of a certain amount of capacity left, the voltage that represents this capacity for a certain temperature and discharge rate is used in each entry. Plotting voltage versus capacity for different temperatures and discharge rates will identify these points
Plotting voltage versus capacity at various temperatures and discharge rates, along with the voltage versus capacity at the shutdown procedure discharge rate, will identify the voltage point at which shutdown should occur assuming a switch from the first discharge rate to the shutdown discharge rate. The residual capacity entries represent the difference between the ideal capacity of the battery and the capacity available at the specific temperature and discharge rate. To compensate remaining capacity, the residual capacity will be subtracted from remaining capacity. The compensation adjustment will happen in real time to avoid sudden drops or jumps. Every time the temperature decreases by one degree, a new interpolated value will be subtracted from the remaining capacity. Every time the temperature increases by one degree, the remaining capacity will be held constant until the discharged capacity equals the interpolated value that should have been added to the remaining capacity (to avoid capacity increases during discharge). This compensation will not begin until after the fully charged status is reset, allowing the remaining capacity to be 100% when the battery is full.
TABLE 4-1:
< 0.2C < 0.5C < 0.8C < 1.1C < 1.4C < 1.7C < 2.0C > 2.0C
V_EOD LOOK-UP TABLE EXAMPLE
<-10 3200 mV 3125 mV 3075 mV -- <0 3100 mV -- -- <10 3050 mV -- <20 -- <30 <40 <50 >50
Residual Capacity
20%
10%
5%
3%
0%
0%
0%
0%
Table 4-1 is an example of the various voltage values that will signal the shutdown points as a function of temperature and discharge rate.
Table 4-2 shows the actual names of the values in the memory. Table 4-3 shows the value definitions.
DS21904C-page 14
(c) 2006 Microchip Technology Inc.
PS810
TABLE 4-2:
CEOD(1) CEOD(2) CEOD(3) CEOD(4) CEOD(5) CEOD(6) CEOD(7) CEOD(7)
VALUE NAMES IN THE MEMORY
TEOD(1) VEOD1(1) VEOD2(1) VEOD3(1) VEOD4(1) VEOD5(1) VEOD6(1) VEOD7(1) VEOD8(1) FCCP(1) TEOD(2) VEOD1(2) VEOD2(2) VEOD3(2) VEOD4(2) VEOD5(2) VEOD6(2) VEOD7(2) VEOD8(2) FCCP(2) TEOD(3) VEOD1(3) VEOD2(3) VEOD3(3) VEOD4(3) VEOD5(3) VEOD6(3) VEOD7(3) VEOD8(3) FCCP(3) TEOD(4) VEOD1(4) VEOD2(4) VEOD3(4) VEOD4(4) VEOD5(4) VEOD6(4) VEOD7(4) VEOD8(4) FCCP(4) TEOD(5) VEOD1(5) VEOD2(5) VEOD3(5) VEOD4(5) VEOD5(5) VEOD6(5) VEOD7(5) VEOD8(5) FCCP(5) TEOD(6) VEOD1(6) VEOD2(6) VEOD3(6) VEOD4(6) VEOD5(6) VEOD6(6) VEOD7(6) VEOD8(6) FCCP(6) TEOD(7) VEOD1(7) VEOD2(7) VEOD3(7) VEOD4(7) VEOD5(7) VEOD6(7) VEOD7(7) VEOD8(7) FCCP(7) TEOD(7) VEOD1(8) VEOD2(8) VEOD3(8) VEOD4(8) VEOD5(8) VEOD6(8) VEOD7(8) VEOD8(8) FCCP(8)
4.4.2
COMPENSATING FOR CELL AGING
As lithium ion cells age, the voltage versus capacity curves become depressed. That is, the battery cell can no longer deliver as high of a voltage as it once could for a given capacity. The overall capacity loss is adjusted for by the relearning of full charge capacity. The End-Of-Discharge voltage points, which are voltage points at which a certain capacity remains, are adjusted using a scaling factor. The End-Of-Discharge voltage points will become lower with each cycle. A cycle is defined as a total amount of discharge capacity equal to full charge capacity. Cycle count is used to determine the age of the cells and the
parameter, AgeFactor, determines the number of millivolts that the voltage becomes depressed per cycle. AgeFactor is subtracted from the End-Of-Discharge voltage for every cycle the battery has been through. AgeFactor units are in eighths of millivolts. Thus, with the effect of aging, the actual End-Of-Discharge voltage becomes:
EQUATION 4-2:
VEODaged = VEOD - (CycleCount * AgeFactor * 0.125) mV
(c) 2006 Microchip Technology Inc.
DS21904C-page 15
PS810
TABLE 4-3:
Parameter Name DesignCapacity RemCap
CAPACITY MONITORING PARAMETERS
# of Bytes 2 2 Units mAh mAh Typical Value 2200 440 Operational Description Battery data value for DesignCapacity. This is the first capacity loaded into the FullChargeCapacity upon power-up. The initial capacity of the battery. When the PS810 is first powered up and initialized, before a learning cycle takes place to learn the full capacity, the full capacity will take the value programmed into RemCap to compute relative State-Of-Charge percentage. A zero zone control is built into the PS810 so that any electrical noise doesn't actually drain the gas gauge, when in fact, the current is zero. For this reason, current less than NullCurr mA in either direction will be measured as zero. Current consumption of the battery module. This is the average current that the battery module typically draws from the battery (255 = 1 mA). Reset FULLY_CHARGED bit at this level, 100 = 100%. When discharging begins, the FULLY_CHARGED bit must remain set until the cell voltages are below EOCVolt, so that a small current will not trigger a false End-Of-Charge trigger. Thus, ClrFullyChrg is set at about 90%. FULLY_CHARGED bit will be on until the battery has discharged to less than 90%.
NullCurr
1
mA
3
PwrConsumption
1
1/256 mA
31
ClrFullyChrg
1
%
90
ConfigCAP
1
bitmap
11100100 bit 7: Compensate remaining capacity - the displayed remaining capacity actually equals FCC minus capacity used minus residual capacity. bit 6: Remaining capacity decrease only - when compensating, if temperature changed causing a decrease in residual capacity, do not let remaining capacity rise to reflect this. Instead, hold it steady until discharge catches up. bit 5: Only compensate on discharge. bit 4: Compensate on null current. bit 3: Unused. bit 2: Set capacity to positive immediately upon charging. If discharged below zero, this allows capacity to count up immediately upon charging. bit 1: Learn unconditionally - relearn FCC under any conditions. Typically used for testing only. bit 0: Disable self-discharge.
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PS810
TABLE 4-3:
Parameter Name FLAGS1
CAPACITY MONITORING PARAMETERS (CONTINUED)
# of Bytes 1 Units bitmap Typical Value Operational Description
b00100000 Bit coded as follows: Bit Function 7 Unused 6 Unused 5 Int/Ext temperature 4 Disable Sleep in main Idle mode. 3 Unused 2 Disable safety GPIO 1 Unused 0 Unused 2 8 10 Maximum change in remaining capacity per measurement period. Recheck period for EOD. Voltage must be below VEOD for this many measurement periods. Reset FULLY_DISCHARGED bit, 100 = 100%. Once fully discharged bit is set, it will stay set until capacity rises above this value, typically 10%. Capacity remaining in battery at EOD. Remaining capacity is loaded with EODCap at EOD. Learned value of battery capacity. Used for battery data value of FullChargeCapacity. This is a learned parameter, which is the equivalent of all charge counted from fully charged to fully discharged, including self-discharge and error terms. This is reset after a learning cycle and used for remaining capacity and relative State-Of-Charge calculations. The number of initial cycles without a relearn limit. Normally, full charge capacity will change by a maximum of 256 mAh when relearned. Since FullCapacity can vary greatly with the first learning cycle, the initial capacity may not be correct; thus, this should be set to at least 2.
RemCapDelta EODRecheck ClrFullyDischrg
1 1 1
1/4 mAh integer %
EODCap FullCapacity
2 2
mAh mAh
100 2200
RLCycles
1
integer
2
TEOD
7
(Celsius * 10 + 200)/4 1/64 C
5, 20, 35, EOD temperature boundaries - 8 increasing values of 50, 80, temperature coded as: TEODx = (Celsius * 10 + 200)/4. 113, 150 19, 32, 48, EOD C-rate boundaries - 8 increasing values of C-rates coded 64, 77, 90, as: CEODx = C-rate * 64. 109 50, 25, 12, Unusable residual capacity before save to disk, corresponding 8, 0, 0, to temperature, 255 = 100%. 0, 0 2700 75 1 2500 Baseline for VEOD formula. End-Of-Discharge voltage, voltage = VEODOffset + 4 * VEOD. Cell voltage at which save to disk is signaled. Scale factor for EOD voltages due to aging (in units of .125 mV), VEODaged = VEOD - (CycleCount * .125 * AgeFactor). Voltage at which coin cell is determined to be empty.
CEOD
7
FCCP
8
255 = 100%
VEODOffset VEOD AgeFactor VEODCoin
2 64 1 2
mV voltage - VEODOffset/4 0.125 mV mV
(c) 2006 Microchip Technology Inc.
DS21904C-page 17
PS810
NOTES:
DS21904C-page 18
(c) 2006 Microchip Technology Inc.
PS810
5.0
5.1
CHARGE CONTROL
Full Charge Detection Methods
For pulse charging, replace condition 2 with Average Current < EOCCurAvg and remove condition 3. When a valid, fully charged EOC condition is detected, the following actions occur: * The FULLY_CHARGED status bit in BatteryStatus is set to `1' to indicate a full condition. (This will remain set until RelativeStateOfCharge drops below the ClrFullyChrg value in memory.) * Remaining capacity is set to FCC and thus, RelativeStateOfCharge is set to 100%.
For a typical lithium ion constant-current/constantvoltage charge system, the PS810 will monitor the taper current that enters the battery. Once the battery has reached the final voltage level of the charger, when VC1 is greater than EOCVolt, taper monitoring will begin. Once the taper current falls between TaperCRate and TaperLow, indicating that the battery is full, the End-OfCharge (EOC) will be triggered. For pulse charging, the average current will be monitored. When average current falls below EOCCurAvg, the EOC will be triggered. So that a sudden drop or removal of charge current doesn't trigger a false EOC when using taper current, the current and the average current must be within StableCurr of each other. Thus, the conditions to trigger EOC are: 1. Cell Voltage > EOCVolt and 2. TaperCRate > Current > TaperLow and 3. Average Current - Current < StableCurr
5.2
Temperature Algorithms
The PS810 provides a temperature alarm set point. HighTempAl: When the measured temperature is greater than HighTempAl, the OVER_TEMP_ALARM bit is set.
TABLE 5-1:
Parameter Name HighTempAl
CHARGE CONTROL PARAMETERS
# Bytes 1 Units (Celsius * 10 + 200)/4 mA Typical Value 200 Operational Description OVER_TEMP_ALARM threshold bit in AlarmWarning register, coded value = (Celsius * 10 + 200)/4. When the temperature exceeds HighTempAl, the OVER_TEMP_ALARM becomes active. EOC trigger for pulse charging. If the average current during pulse charging has dropped below the EOCCurAvg threshold for a pass count equal to the parameter value, EOCRecheck, the End-Of-Charge state will be reached. Number of checks before EOC trigger. The End-Of-Charge conditions must remain for at least this number of periods, before being considered true, to help filter out false full conditions due to spikes. EOC trigger cell voltage. When a cell reaches this voltage, the End-Of-Charge determination will start monitoring the current to determine when the battery is full. When the current is in the proper range and the cell voltage is greater than EOCVolt, then FULLY_CHARGED bit in BatteryStatus will be set. EOC trigger current deviation level. In order to prevent current spikes from causing a premature taper current trigger, the average current and the instantaneous current must be within StableCurr of each other. Upper limit EOC taper current based on temperature, 64 = 1C. Lower limit EOC taper current, 64 = 1C.
EOCCurAvg
2
200
EOCRecheck
1
integer
6
EOCVolt
2
mV
4150
StableCurr
1
mA
50
TaperCRate TaperLow ConfigEOCD
1 1 1
1/64 C 1/64 C bitmap
3 1
10011111 Bit coded as follows: Function Bit 7 Limit remcap to FCC 6 Unused 5 Trigger EOC on average current 4 Trigger EOC on taper current 3 Disallow multiple EODs 2 Limit capacity to EODCap until EOD 1 Set capacity to residual capacity at VEOD 0 Learn FCC at VEOD
(c) 2006 Microchip Technology Inc.
DS21904C-page 19
PS810
NOTES:
DS21904C-page 20
(c) 2006 Microchip Technology Inc.
PS810
6.0
6.1
GPIO CONFIGURATION
Configuring Inputs and Outputs
GPIOs can be set up to act as inputs or outputs that are based on conditions involving battery data parameters, or GPIO levels, compared to constants. This powerful programming model allows for customizing GPIO to set on any possible fuel gauge conditions and reset on any other possible fuel gauge conditions in any groupings. Four parameters define the global behavior of each pin as follows: * GPIOSTATE: defines the state, high or low, the GPIO is in during initialization of the fuel gauge.
* GPIODIRECTION: Defines whether the GPIO is an input or an output. * GPIOCONFIG: enables analog functions NTC and VCOIN vs. GPIO (high byte), enables pull-up or pull-down on inputs (low byte). * GPIOPOLARITY: defines active and inactive polarities. All GPIOs will drive high to VBAT, except for IO0 and IO3, which will drive high to VBAT - 1 volt. All GPIOs have pull-ups and pulldowns when configured as inputs, except IO0 and IO3, which only have pull-downs. IO0 is only available in SPS mode and IO3 is only available when not using VCOIN. Similarly, IO2 is only available when not using NTC.
TABLE 6-1:
GPIOSTATE
GPIO PARAMETERS
Definition Reset State of GPIO GPIO Input or Output Analog or GPIO Bit Description Bit number corresponds to GPIO number bit setting: bit (x) = 1: GPIO defaults to high bit (x) = 0: GPIO defaults to low Bit number corresponds to GPIO number bit setting: bit (x) = 1: GPIO is an input bit (x) = 0: GPIO is an output bit (5) = 1: Pin 1 is NTC thermistor input bit (5) = 0: Pin 1 is GPIO bit (4) = 1: Pin 2 is VCOIN coin cell input bit (4) = 0: Pin 2 is GPIO bit (0) = 1: Disable pull-up and pull-down resistors on inputs bit (0) = 0: Enable pull-up and pull-down resistors on inputs
Name
GPIODIRECTION
GPIOCONFIG High Byte
GPIOCONFIG Low Byte
Pull-up or Pull-down on Inputs
If GPIO is configured as input, then: bit (7-2): 1 = Pull-down 0 = Pull-up bit (1-0): 1 = 1.8V communication 0 = TTL communication
GPIOPOLARITY
Default and Active Polarity
Bit number corresponds to GPIO number bit setting: bit (x) = 1: GPIO is default high, active-low bit (x) = 0: GPIO is default low, active-high
TABLE 6-2:
PARAMETER NUMBER/GPIO NUMBER CORRESPONDENCE
Parameter Bit # 0 1 2 3 4 5 6 7 GPIO # 0/SCL SDA/SPS 6 5 4 3 2 1
(c) 2006 Microchip Technology Inc.
DS21904C-page 21
PS810
6.2 Configuring Output Functions
Powerful and flexible programming protocols allow GPIO configured as outputs to be defined with complex functions based on battery data. Virtually all information about the battery can be used in a multiple level trigger function or Reset function. This programming is accomplished using Microchip programming development tool, PowerToolTM 800. GPIO output functions can be based on the following information functions: * All battery data functions, such as voltage, current, battery status, etc. * The high or low level of any other GPIO * The miscellaneous flags byte which contains the following information: - bit 0: Charge started - bit 1: Discharge started - bit 2: Charge increasing - bit 3: POR detected - bit 4: Unused - bit 5: Wake from Sleep - bit 6: In Low-Voltage Sleep mode - bit 7: In Shelf-Sleep mode - bit 8: In Bus Sleep mode Once an argument is selected from above, an operator is selected to compare it to a constant. The operators are >, <, =, AND and NOR. The latter two are used to compare individual bits in a bit map. For example, AND a bit map against the operand 00000000 00000010 will be true if bit one is a `1'. NOR a bit map against the operand 11111111 11111101 will be true if bit one is a `0'. An example of a condition is : Voltage < 3200 This condition is true if the battery data of voltage is less than 3200 mV. Condition groups can be created by ANDing and ORing individual conditions together. An example condition group is: (Voltage < 3200) AND (Current > 100) OR (Temperature > 60) AND (Current > 200) Because of precedence the equation would be interpreted: ((Voltage < 3200) AND (Current > 100)) OR ((Temperature > 60) AND (Current > 200)) This entire condition group can be programmed to activate a single GPIO. A Reset condition can then be assigned to reset the GPIO if it had triggered as a result of its trigger condition group. Example Reset condition group: (Voltage > 3200) OR (Current = 0) Furthermore, multiple trigger condition groups, each with their own individual Reset condition groups, can be assigned to a single GPIO. This is all accomplished by programming with PowerToolTM 800.
DS21904C-page 22
(c) 2006 Microchip Technology Inc.
PS810
7.0 KEELOQ(R) SECURITY
The PS810 will employ KEELOQ security coding which can ensure only proprietary batteries can be used with the host device. Since the batteries are tailored to the system requirements, an incompatible battery may cause poor performance or even non-performance. A verification challenge will be issued to the battery from the host. The battery will encrypt the challenge data and return it to the host. The host will encrypt the challenge data also and verify that the battery's encrypted response matches. For technical KEELOQ specifications, see Microchip application note AN827, "Using KEELOQ(R) to Validate Subsystem Compatibility" (DS00827). The host issues a "challenge" (i.e., a 32-bit random number) by writing it to the KEELOQ bus function on the PS810. The PS810 firmware contains the KEELOQ encryption algorithm and a 64-bit key. The PS810 runs the 32-bit challenge data along with its 64-bit key through the KEELOQ decrypt algorithm to create a 32-bit response. The host then reads the response from the PS810 using the KEELOQ bus function. The host verifies the response by also running the challenge through the decrypt algorithm using the same key. If the results are the same, authentication is successful. When a challenge is written to the battery, it takes time to generate the encrypted response. Battery status bit 1 is set to one (`1') when a challenge is written and reset to zero (`0') when the response is ready and may be read from the PS810. The security of authentication relies not on the secrecy of the algorithm, but on secrecy and management of the key. The key, the function that stores the key and the KEELOQ decrypt algorithm that uses it are located in memory that is protected from reads and writes. This prevents the key from being read except by code in the boot block and prevents the boot block from being altered without being first erased. The key is stored in an encoded form and during normal execution, never appears in its entirety in RAM. A battery pack's key is stored at time of manufacture. Each pack can have a unique key, further improving security, which is a function of a master key and the pack's serial number. A host would use the master key, the pack serial number and a key generation algorithm to determine an individual pack's key.
(c) 2006 Microchip Technology Inc.
DS21904C-page 23
PS810
NOTES:
DS21904C-page 24
(c) 2006 Microchip Technology Inc.
PS810
8.0
8.1
COMMUNICATION
SMBus/I2C Battery Data Interface
The PS810 uses a two-pin communication protocol compatible with the System Management Bus (SMBus) and the Inter IC Communication (I2CTM) protocols to communicate to the host. One pin is the clock and one is the data. The SMBus/I2C port responds to all battery data commands listed in Table 8-1. To receive information about the battery, the host sends the appropriate commands to the SMBus/I2C port. The battery data command set is summarized in Table 8-1. The PS810 SMBus/I2C communications port is fully compliant with the System Management Bus specification, version 1.1 and supports all previous and new
requirements, including bus time-outs and PEC (CRC-8) error checking. The SMBus port serves as a slave for both read and write functions. SMBus slave protocols supported include Read Word, Write Word, Read Block and Write Block, all with or without PEC (CRC-8) error correction. The SMBus protocol used for PS810 is for the host to master the SMBus. PS810 operates only in Slave mode. The master will send the PS810 device's SMBus write address (0x16 for write) followed by the command code. The host will then send the PS810 device's read address (0x17 for read) and await data. As a response to the read request, the PS810 will send all the data bytes required.
FIGURE 8-1:
SMBus TIMING
tR tLOW tF tHIGH tSU:STA
SCL
tHD:STA tHD:STA tSU:DAT tSU:STA tSU:STO
SDA
tBUF
P
S
S
P
tLOW:SEXT SCLACK tLOW:MEXT tLOW:MEXT SCLACK tLOW:MEXT
SCL
SDA
Note: SCLACK is the Acknowledge related clock pulse generated by the master.
(c) 2006 Microchip Technology Inc.
DS21904C-page 25
PS810
8.2 SPS Single Pin Serial Battery Data Interface
The SPS protocol only allows one byte to be read per command code. Thus, commands that receive twobyte pieces of data must be executed one byte at a time. To get a two-byte data, the command code for the high byte must be sent, the high data byte received and then, the command code for the low data byte must be sent to receive the low data byte. Furthermore, it is possible that the piece of data has changed in between the time it took to get the high byte and the low byte if the host system is communicating slowly. Therefore, it is recommended to always verify the data hasn't changed. This is done by reading the high byte, then reading the low byte, then rereading the high byte and comparing it to the first read to make sure it is the same. If it is not the same, then the low byte can be reread and matched with the new high byte.
The PS810 can also communicate using one pin, the SDA pin with the Single Pin Serial protocol (SPS). The single pin serial interface communication is an asynchronous return-to-one protocol. The signal requires an external pull-up resistor. The timing of the driven low pulses defines the communication. A Break cycle starts a command from the host to the battery. The command is eight bits long. After this, eight data bits are either sent to the battery or received from the battery. The Least Significant bits are sent first. The Break cycle is defined by a low period for a time equal to or greater than tB, then returned high for a time greater than or equal to tBR. The data bits consist of three sections each: 1. 2. 3. Start: a logic low for at least time tSTR. Data: data high or low valid by time tDS and held until time tDH/V. Stop: logic high by time tSSU and held until time TCYC.
DS21904C-page 26
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PS810
FIGURE 8-2: SINGLE PIN SERIAL TIMING
B re a k T im in g B re a k b it B re a k R e s e t
tB H o s t to P S 8 1 0 D a ta b it
tB R
S ta rt b it
S to p b it
t s trh td s u h td h ts s u h t c yc h P S 8 1 0 to H o s t D a ta b it
S ta rt b it
S to p b it
t s trb td s u b tdv ts s u b t c yc b C M D a n d D a ta P ro to c o l C M D A d d re s s B re a k LS B MSB
D a ta to o r fro m PS810 LS B
C o m m u n ic a tio n E x a m p le CM D Addr = 04 hex B re a k 0 1 1 0 0 0 0 0 1 D a ta = 2 5 h e x 0 1 0 0 1 0 0
(c) 2006 Microchip Technology Inc.
DS21904C-page 27
PS810
8.3 Battery Data Function Description
The following subsections document the detailed operation of all of the individual battery data commands.
TABLE 8-1:
PS810 SMBus DATA FUNCTIONS
SMBus Command Code 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x17 0x16 Access Read Read Read Read Read Read Read Read Read Read Read Read Read Read Read Read Read Read/Write Read MFGDate SerialNumber MFGID DevID BatStatus Cycles DesignCapacity Parameter Reference Units 0.1 Celsius mV mA mA % % mAh mAh MInutes Bit Code Integer mAh mV Coded Hex Word Hex Word Hex Word Block Data Block Data
Battery Data Function Name Temperature Voltage Current AverageCurrent RelativeStateOfCharge AbsoluteStateOfCharge RemainingCapacity FullChargeCapacity AverageTimeToEmpty BatteryStatus CycleCount DesignCapacity CoinVoltage ManufactureDate SerialNumber ManufacturerID DeviceID KEELOQ UserData
DS21904C-page 28
(c) 2006 Microchip Technology Inc.
PS810
TABLE 8-2: PS810 SINGLE PIN SERIAL DATA FUNCTIONS
SPS Command Code 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x28 0x29 0x2A 0x2B Access Read Read Read Read Read Read Read Read Read -- Read -- Read Read Read Read Read Read Read -- Read Read Read Read Read Read Read Read Read Read Read Read Read Read Read/Write Read/Write Read/Write Read/Write Cycles Cycles DesignCapacity DesignCapacity DesignVPack DesignVPack MFGDate MFGDate SerialNumber SerialNumber MFGID MFGID DevID DevID MFGData MFGData MFGData MFGData Hex Double Word Integer mAh mV Coded Hex Word Hex Word Hex Word BatStatus mAh mAh MInutes Bit Code % Parameter Reference Units Battery Data Function Name Temperature (low byte) Temperature (high byte) Voltage (low byte) Voltage (high byte) Current (low byte) Current (high byte) AverageCurrent (low byte) AverageCurrent (high byte) RelativeStateOfCharge reserved AbsoluteStateOfCharge reserved RemainingCapacity (low byte) RemainingCapacity (high byte) FullChargeCapacity (low byte) FullChargeCapacity (high byte) AverageTimeToEmpty (low byte) AverageTimeToEmpty (high byte) BatteryStatus reserved CycleCount (low byte) CycleCount (high byte) DesignCapacity (low byte) DesignCapacity (high byte) CoinVoltage (low byte) CoinVoltage (high byte) ManufactureDate (low byte) ManufactureDate (high byte) SerialNumber (low byte) SerialNumber (high byte) ManufacturerID (low byte) ManufacturerID (high byte) DeviceID (low byte) DeviceID (high byte) KEELOQ (low byte) KEELOQ (second byte) KEELOQ (third byte) KEELOQ (high byte)
0.1 Celsius mV mA mA %
(c) 2006 Microchip Technology Inc.
DS21904C-page 29
PS810
8.3.1 Temperature (0.1 CELSIUS) 8.3.11 CycleCount (INTEGER)
Returns the cell pack's internal temperature. CycleCount is updated to keep track of the total usage of the battery. CycleCount is increased whenever an amount of charge has been removed from the battery equivalent to the full capacity.
8.3.2
Voltage (mV)
Returns the pack voltage.
8.3.3
Current (mA)
8.3.12
DesignCapacity (mAh)
Returns the current being supplied (or accepted) through the battery's terminals.
Returns the theoretical capacity of a new pack.
8.3.13
CoinCellVoltage (mV)
8.3.4
AverageCurrent (mA)
Returns the voltage of the coin cell.
Returns a rolling average of the current being supplied (or accepted) through the battery's terminals. The time period over which current is averaged is adjustable.
8.3.14
ManufactureDate (CODE)
8.3.5
RelativeStateOfCharge (%)
This function returns the date the pack was manufactured in a coded integer. The date is packed in the following fashion: (year-1980) * 512 + month * 32 + day.
Returns the predicted remaining battery capacity expressed as a percentage of FullChargeCapacity.
8.3.15
SerialNumber (HEX WORD)
8.3.6
AbsoluteStateOfCharge (%)
Returns the predicted remaining battery capacity expressed as a percentage of DesignCapacity. Note that AbsoluteStateOfCharge can return values greater than 100%.
This function is used to return a serial number. This number, when combined with the ManufacturerID, the DeviceID and the ManufactureDate, will uniquely identify the battery.
8.3.16
ManufacturerID (HEX WORD)
8.3.7
RemainingCapacity (mAh)
This function returns a hex word containing the battery manufacturer's ID.
Returns the predicted remaining battery capacity. The RemainingCapacity value is expressed as: Current x Time.
8.3.17
DeviceID (HEX WORD)
This function returns a hex word that contains the battery's ID.
8.3.8
FullChargeCapacity (mAh) 8.3.18 KEELOQ (BLOCK DATA)
This function is used for identification of the battery to the system. The host system writes a 4-byte challenge of random data to the battery. The PS810 runs the challenge data through the KEELOQ algorithm using a safe key entered at time of manufacture. (An option is to have this key based on a manufacturer's key and the serial number.) The host then reads the 4-byte response and compares it with an internally generated response using the same key. The responses must match for validation.
Returns the predicted pack capacity when it is fully charged.
8.3.9
AverageTimeToEmpty (MINUTES)
Returns a rolling average of the predicted remaining battery life. The time period over which it is averaged is the same as AverageCurrent.
8.3.10
BatteryStatus (FLAGS)
Returns the Smart Battery's status word. The BatteryStatus function is used by the power management system to get alarm and status bits. Battery Status Bits: bit 7: bit 6: bit 5: bit 4: bit 3: bit 2: bit 1: bit 0: INITIALIZED DISCHARGING FULLY_CHARGED FULLY_DISCHARGED OVER_TEMP_ALARM Unused KEELOQ response processing COIN_CELL_EMPTY
8.3.19
UserData (BLOCK DATA)
Reads 1 to 32 bytes from the UserData block in Flash. The number of bytes read is determined by parameter UserDataLen. This is a general purpose storage of any information a user may want to read. Note: This command is only available in SMBus mode, not SPS mode.
DS21904C-page 30
(c) 2006 Microchip Technology Inc.
PS810
9.0 PARAMETER SETUP
This section documents all of the programmable parameters that are resident in the memory.
TABLE 9-1:
Parameter Name AgeFactor AOMInterval AVGIScale
ALPHABETICAL LISTING OF PARAMETERS
# Bytes 1 1 1 Units 0.125 mV op cycles coded Typical Value 0 60 b00100000 Operational Description Scale factor for EOD voltages due to aging. In units of .125 mV, VEODaged = VEOD - (CycleCount * AgeFactor). Interval between auto-offset calibrations. Time period over which current is averaged to calculate average current, IAVG = IAVG + (I - IAVG)/AVGIScale. Note: Only Most Significant set bit is used, others are ignored.
1xxxxxxx: IAVG = IAVG + (I - IAVG)/256 01xxxxxx: IAVG = IAVG + (I - IAVG)/128 001xxxxx: IAVG = IAVG + (I - IAVG)/64 0001xxxx: IAVG = IAVG + (I - IAVG)/32 00001xxx: IAVG = IAVG + (I - IAVG)/16 000001xx: IAVG = IAVG + (I - IAVG)/8 0000001x: IAVG = IAVG + (I - IAVG)/4 00000001: IAVG = IAVG + (I - IAVG)/2 BGCal CalStatus 1 1 integer bitmap 14 b11111111 Band gap voltage calibration factor. Bit coded as follows: Function Bit 7 RCOSC 6 TEMP 5 CURRENT 4 VC1 3 VCOIN 0 = Not calibrated 1 = Calibrated Correction Factor for Coin Cell Voltage. Correction Factor for Current. Adjusts the scaling of the sense resistor current measurements. Correction Factor for Temperature. Adjusts the scaling of temperature measured across an external thermistor at the NTC input pin. Correction Factor for Temperature. Adjusts the scaling of temperature measured from the internal temperature sensor. Correction Factor for Pack Voltage. Adjusts the scaling of the pack voltage measurements. Used to calibrate the measurement of pack voltage between VC1 input pin and ground. Reset FULLY_CHARGED bit at this level, 100 = 100%. When discharging begins, the FULLY_CHARGED bit should remain set until the cell voltages are below EOCVolt, so that a small current will not trigger a false End-Of-Charge trigger. Reset FULLY_DISCHARGED bit, 100 = 100%. Once fully discharged bit is set, it will stay set until capacity rises above this value, typically 10%. Correction Offset for Current. This is the value the A/D reads when zero current is flowing through the sense resistor.
CFCoin CFCurr CFTempE
2 2 2
integer integer integer
2250 4200 326
CFTempI CFVoltage
2 2
integer integer
2038 2250
ClrFullyChrg
1
%
90
ClrFullyDischrg
1
%
10
COCurr
1
signed byte
0
(c) 2006 Microchip Technology Inc.
DS21904C-page 31
PS810
TABLE 9-1:
Parameter Name COD Config1
ALPHABETICAL LISTING OF PARAMETERS (CONTINUED)
# Bytes 1 1 Units signed byte bitmap Typical Value 0 b00010000 Operational Description Correction Offset Deviation. Offset value for the module effect on the current readings. bit 7: Internal use only. bit 6: 1 = FG overrides bootloader high priority interrupt service bit 5: 1 = Bootloader write commands disabled until locked bit 4: 1 = Disable bootloader write commands bit 3: 1 = Start in SMBus mode 0 = SPS mode bit 2: 1 = 32 ms SMBus time-out 0 = 16 ms SMBus time-out bit 1: 1 = Flash reading is locked 0 = Flash reading is unlocked bit 0: Unused. bit 7: Compensate remaining capacity - the displayed remaining capacity actually equals FCC minus capacity used minus residual capacity. bit 6: Remaining capacity decrease only - when compensating, if temperature change causes a decrease in residual capacity, do not let remaining capacity rise to reflect this. Instead, hold it steady until discharge catches up. bit 5: Only compensate remaining capacity on discharge. bit 4: Enable compensation during null current. bit 3: Unused bit 2: Set capacity to positive immediately upon charging. If discharged below zero, this allows capacity to count up immediately upon charging. bit 1: Learn unconditionally - relearn FCC under any conditions. Typically used for testing only. bit 0: Disable self-discharge.
ConfigCAP
1
bitmap
11100100
DS21904C-page 32
(c) 2006 Microchip Technology Inc.
PS810
TABLE 9-1:
Parameter Name ConfigEOCD
ALPHABETICAL LISTING OF PARAMETERS (CONTINUED)
# Bytes 1 Units bitmap Typical Value 10011111 Operational Description Bit coded as follows: Bit Function 7 Limit remaining capacity to FCC 6 Unused 5 Trigger EOC on average current 4 Trigger EOC on taper current 3 Disallow multiple EODs 2 Limit capacity to EODCap until EOD 1 Set capacity to residual capacity at VEOD 0 Learn FCC at VEOD Correction offset for external temperature. Correction offset for internal temperature. Battery data register for CycleCount. Cycles is updated to keep track of the total usage of the battery. Cycles is increased whenever an amount of charge has been removed from the battery, equivalent to the full capacity. Battery data value for DesignCapacity. This is the first capacity loaded into the FullChargeCapacity upon initial power-up. Battery data value for DeviceID (2-byte hex word). EOC trigger for pulse charging. If the average current during charging has dropped below the threshold for a pass count equal to EOCRecheck, the End-Of-Charge state will be reached. Number of checks before EOC trigger. The End-Of-Charge conditions must remain for at least this number of periods before being considered true. EOC trigger cell voltage. When the cell reaches this voltage, the PS810 will start monitoring the current to determine when the battery is full. When the current is in the proper range and the cell voltage is greater than EOCVolt, then the FULLY_CHARGED bit in BatteryStatus will be set. Reserve remaining capacity at EOD. Recheck period for EOD. Voltage must be below VEOD for this many measurement periods. Flash data block version. Bit coded as follows: Function Bit 7 Unused 6 Unused 5 Int/Ext temperature 4 Disable Sleep in main Idle mode 3 Unused 2 Disable safety GPIO 1 Unused 0 Unused Learned value of battery capacity. Used for battery data value of FullChargeCapacity. This is a learned parameter which is the equivalent of all charge counted from fully charged to fully discharged, including self-discharge and error terms. This is reset after a learning cycle and used for remaining capacity and relative State-Of-Charge calculations.
COTempE COTempI Cycles
2 2 2
signed word signed word integer
21198 21198 0
DesignCapacity DevID EOCCurAvg
2 2 2
mAh hex word mA
2200 AAAA 200
EOCRecheck
1
op cycles
6
EOCVolt
2
mV
4150
EODCap EODRecheck FDBVersion FLAGS1
2 1 1 1
mAh op cycles integer bitmap
100 8 -- 00100000
FullCapacity
2
mAh
2200
(c) 2006 Microchip Technology Inc.
DS21904C-page 33
PS810
TABLE 9-1:
Parameter Name HighTempAl MFGDate
ALPHABETICAL LISTING OF PARAMETERS (CONTINUED)
# Bytes 1 2 Units coded byte coded hex word Typical Value 200 0x3246 Operational Description OVER_TEMP_ALARM bit threshold, Coded Value = (Celsius * 10 + 200)/4. Battery data value for ManufactureDate. The date of manufacture of the battery pack can be programmed here and retrieved with the battery data ManufactureDate command, Coding: Date = (Year-1980) x 512 + Month x 32 + Day. Value for ManufacturerID (2-byte hex word). State change delay filter. Delays the change between "charge increasing" state and "charge decreasing" state based on current direction. To avoid problems with current spikes in opposite directions, a delay filter is built in to control when to change from charging status to discharging status. The current must change directions and stay in the new direction for NChangeState periods before the status is changed and capacity is increased or decreased as a result of the new current direction. A zero zone control is built into the PS810 so that any electrical noise doesn't actually drain the gas gauge, when in fact, the current is zero. For this reason, current less than NullCurr mA in either direction will be measured as zero. RC oscillator trimming. bit 4: 1 = Enable Bus Inactive Low-Power mode 0 = Disable Bus Inactive Low-Power mode bit 3: 1 = Use Ultra Low-Power mode as Bus Inactive Low-Power mode (no self-discharge calculations) 0 = Use Low-Power mode with self-discharge calculations as Bus Inactive Low-Power mode bit 2: 1 = Require NullCurr for Bus Inactive Low-Power mode and Low-Voltage Sleep mode 0 = No NullCurr requirement for Sleep modes bit 1: 1 = Use Ultra Low-Power mode as Low-Voltage Sleep mode 0 = Use Low-Power mode as Low-Voltage Sleep mode bit 0: 1 = Set remcap to zero when entering Low-Voltage Sleep mode 0 = Do not change remcap when entering Low-Voltage Sleep mode First password for the battery pack lock. Second password for the battery pack lock. Current consumption of the battery module. This is the average current that the battery module typically draws from the battery (255 = 1 mA). Current consumption of battery module when in Sleep mode. Reference voltage calibration factor.
MFGID NChangeState
2 1
hex word op cycles
- 2
NullCurr
1
mA
3
OscCal PowerModes
1 1
integer bitmap
206 b00000101
PW1 PW2 PwrConsumption
2 2 1
integer integer 1/256 mA
- - 31
PwrConsumSleep RefCal
1 1
1/256 mA integer
7 0
DS21904C-page 34
(c) 2006 Microchip Technology Inc.
PS810
TABLE 9-1:
Parameter Name RemCap
ALPHABETICAL LISTING OF PARAMETERS (CONTINUED)
# Bytes 2 Units mAh Typical Value 440 Operational Description The initial capacity of the battery. When the PS810 is first powered up and initialized, before a learning cycle takes place to learn the full capacity, the full capacity will take the value programmed into RemCap to compute relative State-Of-Charge percentage. Maximum change in remaining capacity per measurement period. The number of initial cycles without a relearn limit. The initial number of cycles where the relearn limit is not active. Normally, full charge capacity will change by a maximum of 256 mAh when relearned. Since FullCapacity can vary greatly with the first learning cycle, the initial capacity may not be correct; thus, this should be set to at least 2. Battery data value for SerialNumber. The serial number of the battery pack can be programmed here and retrieved with the battery data SerialNumber command. The pack voltage at which the PS810 will enter Low-Voltage Sleep mode. EOC trigger current deviation level. In order to prevent current spikes from causing a premature taper current trigger, the average current and the instantaneous current must be within StableCurr of each other for the End-Of-Charge to trigger on the taper current. Upper limit EOC taper current, 64 = 1C. Lower limit EOC taper current, 64 = 1C. Number of bytes read by UserData SMBus command. Empty voltage of coin cell. Base voltage for VEOD look-up table.
RemCapDelta RLCycles
1 1
1/4 mAh integer
2 2
SerialNumber
2
integer
-
SleepVoltage StableCurr
2 1
mV mA
2700 50
TaperCRate TaperLow UserDataLen VEODCoin VEODOffset
1 1 1 2 2
1/64 C 1/64 C bytes mV mV
3 1 2 2500 2700
(c) 2006 Microchip Technology Inc.
DS21904C-page 35
PS810
NOTES:
DS21904C-page 36
(c) 2006 Microchip Technology Inc.
PS810
10.0 ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Description Voltage Directly at any pin Temperature under Bias Storage Temperature (package dependent) Min. -0.5 -20 -35 Max. 7.0 85 120 Units V C C
TABLE 10-1:
Symbol VPIN TBIAS TSTORAGE Note:
These are stress ratings only. Stress greater than the listed ratings may cause permanent damage to the device. Exposure to absolute maximum ratings for an extended period may affect device reliability. Functional operation is implied only at the listed operating conditions below.
TABLE 10-2:
Symbol VC1 VDD IDD IDDSLP IDDSSLP VIL VIH IIL-IO0PU IL-IO VOL-IO VOH-IO VSR INTC VIL-SMB VIH-SMB VOL-SMB VOH-SMB
DC CHARACTERISTICS (TA = -20C TO +85C; VDD (INTERNAL) = +2.8V 7%)
Description Supply Voltage Internal Regulated Supply Voltage Supply Current - Run mode Supply Current - Sleep mode Supply Current - Shelf-Sleep mode Input Low Voltage - GPIO Input High Voltage - GPIO GPIO Input Low Current - Pull-up mode Leakage Current - IO pins Programmed as Outputs or Inputs without Pull-up Output Low Voltage for GPIO Output High Voltage for GPIO Configured as Push-Pull Sense Resistor Input Voltage Range Thermistor Output Current Input Low Voltage for SMBus pins Input High Voltage for SMBus pins Output Low Voltage for SMBus pins Output High Voltage for SMBus pins Min. 2.5 -- -- -- -- -- 0.8 * VDD 7 -- -- 2.0 -152 -- -0.5 2.0 -- 2.1 -0.5 1.48 -- 1.48 100 -- Typ. -- 2.8 100 22 600 -- -- -- 1 -- -- -- 5.2 -- -- -- -- -- -- -- -- -- -- Max. 5.5 -- 125 25 1000 0.2 * VDD -- 90 2 0.4 -- 152 -- 0.8 5.5 0.4 5.5 0.32 2.12 0.32 2.12 350 8 Units V V A A nA V V A A V V mV A V V V V V V V V A A IPULLUP = 350 A IOL = 0.5 mA IOH = 100 A Varies with battery voltage A/D active (Note 1) Sleep mode (Note 1) Shelf-Sleep mode (Note 1) Condition (Note 3)
VIL-SMB (1.8V) Input Low Voltage for SMBus pins at 1.8V VIH-SMB (1.8V) Input High Voltage for SMBus pins at 1.8V VOL-SMB (1.8V) Output Low Voltage for SMBus pins at 1.8V VOH-SMB (1.8V) Output High Voltage for SMBus pins at 1.8V IPULLUP-SMB ILEAK-SMB Note 1: 2: Current through Pull-up Resistor or Current Source for SMBus pins Input Leakage Current - SMBus pins
3:
Does not include current consumption due to external loading on pins. Sample mode current is specified during an A/D inactive cycle. Sample mode average current can be calculated using the formula: Average Sample Mode Supply Current = (IDDRUN + (n - 1) * IDDINS)/n; where "n" is the programmed sample rate. A/D accuracy is maintained between 2.7 volts and 4.5 volts.
(c) 2006 Microchip Technology Inc.
DS21904C-page 37
PS810
TABLE 10-3:
Symbol fRC fA/D tPOR tSHELF tWAKE
AC CHARACTERISTICS (TA = -20C TO +85C; VDD (INTERNAL) = +2.8V 7%)
Description Min. 509.952 -- -- 1 1 Typ. 512 fRC/16 2 -- -- Max. 514.048 -- 10 -- -- Units kHz kHz ms ms ms SDA and SCL go high Delay from time when VC1 voltage exceeds 2.7V Condition
Internal RC Oscillator Frequency Internal A/D Operating Clock Power-on Reset Delay Delay to Entry of Shelf-Sleep mode Delay to Exit of Shelf-Sleep mode
TABLE 10-4:
Symbol fSMB tBUF tSHLD tSU:STA tSU:STOP tHLD tSETUP tLOW tHIGH tLOW:SEXT tHIGH:MEXT tF tR Note 1:
AC CHARACTERISTICS - SMBus/I2CTM (TA = -20C TO +85C; VDD (INTERNAL) = +2.8V 7%)
Description SMBus Clock Operating Frequency Bus Free Time between Start and Stop Bus Hold Time after Repeated Start Setup Time before Repeated Start Stop Setup Time Data Hold Time Data Setup Time Clock Low Period Clock High Period Message Buffering Time Message Buffering Time Clock/Data Fall Time Clock/Data Rise Time Min. 10 4.7 4.0 4.7 4.0 0 250 4.7 4.0 -- -- -- -- Typ. -- -- -- -- -- -- -- -- -- -- -- -- -- Max. 100 -- -- -- -- -- -- -- 50 10 10 300 1000 Units kHz s s s s ns ns s s ms ms ns ns (Note 2) (Notes 1, 3) (Notes 1, 4) (Note 5) (Note 5) Condition Slave mode
2: 3: 4: 5:
The PS810 will time-out when the cumulative message time defined from Start-to-Ack, Ack-to-Ack or Ack-to-Stop exceeds the value of TTIMEOUT, min. of 25 ms. The PS810 will reset the communication no later than TTIMEOUT, max. of 35 ms. tHIGH max. provides a simple, ensured method for devices to detect bus Idle conditions. tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to the stop. tHIGH:MEXT is the cumulative time a master device is allowed to extend its clock cycles within each byte of a message as defined from Start-to-Ack, Ack-to-Ack or Ack-to-Stop. Rise and fall time is defined as follows: tR = (VILMAX - 0.15) to (VIHMIN + 0.15) tF = 0.9 VDD to (VILMAX - 0.15)
DS21904C-page 38
(c) 2006 Microchip Technology Inc.
PS810
TABLE 10-5:
Symbol tCYCH tCYCB tSTRH tSTRB tDSUH tDSUB tDH tDV tSSUH tSSUB tRSPS tB tBR
AC CHARACTERISTICS: SPS INTERFACE (TA = -20C TO +85C; VDD (INTERNAL) = +2.8V 7%)
Description Cycle Time, Host to Battery Cycle Time, Battery to Host Start Time, Host to Battery Start Time, Battery to Host Data Setup Time, Host to Battery Data Setup Time, Battery to Host Data Hold Time, Host to Battery Data Valid Time, Battery to Host Stop Setup, Host to Battery Stop Setup Time, Battery to Host Response Time of Battery to Host Break Time Break Recovery Time Min. 190 190 5 32 -- -- 90 -- -- -- 190 190 40 Typ. -- 205 -- -- -- -- -- -- -- -- -- -- -- Max. -- 250 -- -- 50 50 -- 80 145 145 320 -- -- Units s s ns s s s s s s s s s s Condition
TABLE 10-6:
Symbol ADRES tCONV VADIN
A/D CONVERTER CHARACTERISTICS (TA = -20C TO +85C; VREG (INTERNAL) = +2.8V 7%)
Description Min. 9 -- -150 0 Typ. -- 2n/fA/D -- -- -- -- -- -- Max. 15 -- 150 300 0.100 0.100 0.100 0.004 Units bits s mV mV % % % % Differential (Note 1) Single-Ended Condition
A/D Converter Resolution A/D Conversion Measurement Time, n-bit + sign A/D Converter Input Voltage Range (internal)
EVGAIN ETEMP EINL Note 1:
Supply Voltage Gain Error Temperature Gain Error Integrated Nonlinearity Error
-- -- -- --
EVOFFSET Compensated Offset Error
Voltage is internal at A/D converter inputs. SR, PTAT and NTC are measured directly. VC1 and VCOIN inputs are measured using internal level translation circuitry that scales the input voltage range appropriately for the converter.
TABLE 10-7:
Symbol ETIME
SILICON TIME BASE CHARACTERISTICS (TA = -20C TO +85C; VREG (INTERNAL) = +2.8V 7%)
Description Min. -- Typ. -- Max. 0.4 Units % Condition Bias Resistor ROSC Tolerance = 1% TL = 25 ppm
Silicon Time Base Error
TABLE 10-8:
Symbol TRES TACC TDRIFT
TEMPERATURE MEASUREMENT ACCURACY (TA = -20C TO +85C; VREG (INTERNAL) = +2.8V 7%)
Description Min. -- -3 -- Typ. 1 -- -2 Max. -- 3 -- Units C C C/V VREG = 3.6V, requires calibration in the application Condition
Reported Temperature Resolution Reported Temperature Accuracy Reported Temperature Drift
(c) 2006 Microchip Technology Inc.
DS21904C-page 39
PS810
NOTES:
DS21904C-page 40
(c) 2006 Microchip Technology Inc.
PS810
11.0
11.1
PACKAGING INFORMATION
Packaging Marking Information
14-Lead TSSOP
Example
XXXXXXXX YYWW NNN
PS810 e3 0510 017
16-Lead QFN
Example
XXXXXXX XXXXXXX YYWWNNN
PS810 /ML e3 0510017
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2006 Microchip Technology Inc.
DS21904C-page 41
PS810
11.2 Package Details
The following sections give the technical details of the packages.
14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm Body (TSSOP)
E E1 p
D
2 n B 1
A c
L A1 A2
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B
MIN
INCHES NOM 14 .026 .035 .004 .251 .173 .197 .024 4 .006 .010 5 5
MAX
MIN
.033 .002 .246 .169 .193 .020 0 .004 .007 0 0
.043 .037 .006 .256 .177 .201 .028 8 .008 .012 10 10
MILLIMETERS* NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087
DS21904C-page 42
(c) 2006 Microchip Technology Inc.
PS810
16-Lead Plastic Quad Flat No Lead Package (ML) 4x4x0.9 mm Body (QFN) - Saw Singulated
D EXPOSED METAL PAD
D1
e E E1
2 1
b
TOP VIEW
OPTIONAL INDEX AREA
n
BOTTOM VIEW
L
A
A3
A1
Number of Pins Pitch Overall Height Standoff Contact Thickness Overall Width Exposed Pad Width Overall Length Exposed Pad Length Contact Width Contact Length
Units Dimension Limits n e A A1 A3 E E2 D D2 b L
MIN
.031 .000 .152 .100 .152 .100 .010 .012
INCHES NOM 16 .026 BSC .035 .001 .008 REF .157 .106 .157 .106 .012 .016
MAX
MIN
.039 .002 .163 .110 .163 .110 .014 .020
MILLIMETERS* NOM 16 0.65 BSC 0.80 0.90 0.00 0.02 0.20 REF 4.00 3.85 2.55 2.70 3.85 4.00 2.55 2.70 0.25 0.30 0.30 0.40
MAX
1.00 0.05 4.15 2.80 4.15 2.80 0.35 0.50
*Controlling Parameter Notes: JEDEC equivalent: MO-220
Drawing No. C04-127 Revised 04-24-05
(c) 2006 Microchip Technology Inc.
DS21904C-page 43
PS810
NOTES:
DS21904C-page 44
(c) 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and Zena are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2006 Microchip Technology Inc.
DS21904C-page 45
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 San Jose Mountain View, CA Tel: 650-215-1444 Fax: 650-961-0286 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
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ASIA/PACIFIC
India - Bangalore Tel: 91-80-2229-0061 Fax: 91-80-2229-0062 India - New Delhi Tel: 91-11-5160-8631 Fax: 91-11-5160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
10/31/05
DS21904C-page 46
(c) 2006 Microchip Technology Inc.

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